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2010 IEEE RFIC Symposium

RFIC Workshops

Sunday, 13:00 - 17:00
Advances in Filtering and Sampling for Integrated Transceivers

Reviewed by: RFIC, MTT-9, MTT-20

Tom Riley, Kaben Wireless Silicon Inc.

Blocker and interference filtering is a key issue in highly integrated Software Defined Radio (SDR) Receivers. If blockers can be removed prior to the ADC and conversion to the digital domain, power and area in the ADC can be greatly reduced.

This workshop will show how Analog, sampled-time signal processing can be used to implement highly selective FIR, IIR and spatial FIR filters. N-path filtering can be used to design high bandwidth filters using low bandwidth analog components. Component mismatch, timing jitter and other sources of error that can affect receiver performance will be discussed. Linearity enhancement techniques for filters will be presented, as well as wideband RF front-end circuit techniques. For added blocker rejection, notched Delta-Sigma data converters are presented.

Following each speaker's presentation, the floor will be opened for interactive discussion with the audience.


  1. Tom Riley, Kaben Wireless Silicon Inc.
    "Advances in Discrete-Time Analog Filtering"
  2. Professor Bogdan Staszewski, Technical University of Delft
    "Discrete-Time Receiver"
  3. Professor Asad Abidi, University of California, Los Angeles
    "A Discrete-Time Wideband Receiver for Software-Defined Radio"
  4. Dr. Martin Snelgrove, Kapik Integration Inc.
    "Interference Mitigation in Receivers"

Sunday, 8:00 - 17:00
Interference, Noise and Coupling Effects in Modern SoC and SiP Products: Issues, Problems and Solutions

Reviewed by: RFIC, MTT-6, MTT-12

            Jan Niehof, NXP Semiconductors
            Matthias Locher, ST-Ericsson
            Oren Eliezer, Xtendwave

The focus of this interactive workshop will be on resolving noise and self-interference problems: on-chip coupling effects, chip-package co-design, substrate issues, noise (inherent and external), coupling-aware RFIC floor planning, digitally assisted solutions for interference problems, EMC (chip and board level), design practices, and CAD/EDA modeling capabilities to effectively analyze and address these effects. Recognized companies and partnerships active in the semiconductor industry will present actual issues encountered in their designs and the solutions/design-practices used to address them, including key lessons learned. Interactive discussions will be facilitated to exchange valuable ideas for the benefit of participants and the industry at large.


  1. Nikos Haralabidis, Broadcom
    “Self-Interference in Multi-Standard RF SoC Transceivers”
  2. Dietolf Seippel, Infineon
    “Floor planning of complex Baseband-Radio SoCs in consideration of cross talk prevention”
  3. Matthias Locher, ST-Ericsson
    “A Bottom-Up Design and Verification Approach for Coexistence in Multi-System SoCs”
  4. Ayman Fayed, Iowa State University,   Oren Eliezer, Xtendwave
    “System-level methodology for the power management system design in complex SoCs: minimize the impact of interference through the supply”
  5. Jonathan Jensen, Intel
    “Isolation and coexistence challenges – a single-chip Bluetooth/WiFi combo example”
  6. Jan Niehof, NXP Semiconductors
    “Interference issues and coupling effects in RF products”
  7. Ravi Subramanian, Berkeley Design Automation
    “Advances in CAD: Simulation & Analysis of RF SoCs”

Sunday, 8:00 - 12:00
MOSFET Modeling for RFIC Design Based On the Industry-Standard PSP Model

Reviewed by: RFIC, MTT-6

            Kevin McCarthy, University College Cork
            Weiman Wu, Arizona State University

This workshop will present an overview of the state-of-the art in MOSFET modeling for the design of CMOS Radio Frequency ICs using modern nanometer-scale CMOS. It focuses on the industry-standard PSP (MOSFET) and MOSVAR (varactor) models. The workshop will review the fundamentals of both models and demonstrate the highly-accurate RF simulation capabilities they provide for RFIC designs. The workshop will also show how the PSP model can be extended to SOI and Multi-Gate devices, which will become of increasing importance to RFIC design.


  1. Gert-Jan Smit, NXP Semiconductors
    “The PSP Compact MOSFET Model: Physical Background and Benefits for RFIC Design”
  2. Brandt Braswell, Freescale Semiconductor
    “Deployment of an Advanced MOSFET Model in an Industrial Context”
  3. James Victory, Sentinel IC Technologies
    “MOSVAR – A PSP-Derived MOS Varactor Model”
  4. Weimin Wu, Arizona State University
    “PSP-Based Modeling of SOI and Multi-Gate MOS Devices”

Sunday, 8:00 - 17:00
Power Management for Integrated RF Circuits: Challenges and Solution

Reviewed by: RFIC, MTT-6

Ayman Fayed, Iowa State University
Waleed Khalil, Ohio State University
Oren Eliezer: Xtendwave

The recent expansion in the use of mobile communications and multi-media devices has fueled the demand for various wireless/RF transceivers to be integrated in a single SoC with the digital processing circuitry and power management functions. As battery life in mobile devices is critical, and with these transceivers typically not operating directly from the battery, regulating and delivering power to them in an efficient manner is becoming a bottleneck.
Since power delivery efficiency and implementation cost on one hand, and noise and regulation quality on the other hand are two contradictory factors in traditional power management circuits, RF loads present a great challenge due to their high sensitivity to their power supply quality. This workshop will discuss the challenges and tradeoffs that power management designers have to make when designing for RF loads while maintaining high efficiency and cost-effectiveness.


  1. Ayman Fayed, Iowa State University
    “Challenges in Integrated Power Management for Analog, RF, and mixed-signal SoCs”
  2. Keith Kunz, Texas Instruments
    “Integrated DC-DC converters in nanometer CMOS RF SOCs”
  3. Bertan Bakkaloglu, Arizona State University
    “Low-noise switched-mode and low-dropout linear regulators for RF applications”
  4. Siamak Abedinpour, Freescale
    “An overview of Integrated Power Management Circuits for Portable RF applications”
  5. Sam Palermo, Texas A&M University
    “Supply Regulation Techniques for Frequency Synthesizers”
  6. David Allstot, Jeffery Walling, University of Washington
    “Supply Regulators in Class-E/G/H CMOS Power Amplifiers”
  7. Ram Sadhwani, Intel
    “Direct powering of RF and analog circuits from DC-DC converters”
  8. Ahmed Emira, Newport Media
    “DC-DC converters noise considerations in RF SoCs”

Sunday, 8:00 - 17:00
Re-configurable Multi-Radios at the Nanoscale

Reviewed by: RFIC, MTT-6, MTT-20

            Gernot Hueber, DICE, Linz, Austria
            Robert Bogdan Staszewski, Delft University of Technology, The Netherlands
            Stefan Heinen, RWTH Aachen University, Aachen, Germany

Advances in CMOS fabrication technology have enabled the use of CMOS in today’s RF transceivers for wireless communications. Multi-band and multi-mode radios covering the diversity of communication standards from 2G GSM, 3G UMTS, to 4G LTE impose unique challenges on the RF-transceiver design due to limitations of reconfigurable RF components that meet the demanding cellular performance criteria at costs that are attractive for mass market applications.  Nanoscale CMOS on one hand features the possibility for implementing a significant computational power and complex functionality directly on a single IC, on the other hand it shows poor raw performance or RF circuits compared to other technologies. The focus of this workshop is on the challenges the cellular standards pose on future multi-radio integration in nanoscale CMOS, along with a thorough discussion of advanced techniques for receivers and transmitters towards integration in a multi-radio SoC or SiP. Approaches include novel architectures, highly configurable analog circuitry, digitally assisted and enhanced analog/RF modules and the integration of digital signal processing into the traditionally purely analog front-ends.


  1. Gernot Hueber, DICE, Austria
    “Flexible RF Transceivers for 4G Systems”
  2. Ali M. Niknejad, UC Berkeley, CA
    “High Dynamic Range Wide Bandwidth Building Blocks for Multi-Mode CMOS”
  3. Vito Giannini, IMEC, Leuven, Belgium
    “The Green-Scalable Revolution of Nanoscale Software-Defined Radios”
  4. Jaques C. Rudell, University of Washington, WA
    “Nanometer CMOS Transceiver Design Enters the Era of “Co-Existence” and the SDR”
  5. Hooman Darabi, Broadcom, Irvine, CA
    “Radio architectures for 2/3/4G highly integrated cellular applications”
  6. Francois Rivet, IMS Lab, University of Bordeaux & Atlantic Innovation ES, France
    “Towards Software Radio Receiver”
  7. Ali Hajimiri, Caltech, CA
    “Electromagnetically Reconfigurable Radios: Antenna Meets Digital”
  8. Frank Op 't Eynde, Audax-Technologies Ltd., Wilsele, Belgium
    “Unsolved Issues in SDR RF Frontends”
  9. Larry Larson, University of California, San Diego, CA
    “Low-Power Transmitters in Nanoscale CMOS”
  10. Robert Bogdan Staszewski, TU Delft, The Netherlands
    “Advances in Digital RF Architectures”

Sunday, 8:00 - 17:00
Multi-Mode Front End Design Challenges and Techniques

Reviewed by: RFIC, MTT-6, MTT-20

Edward Spears, RFMD
Nick Chang, Skyworks Solutions

With the proliferation of data services, mobile device original equipment manufacturers (OEMs) are presented with new, unprecedented challenges and demands from both mobile operators and consumers.  Mobile operators require customized handsets and mobile devices to meet various consumer roaming needs, and the issue of rapid customization has fallen to OEMs who must configure these complex 3G devices to function in multiple frequency bands and operating modes (GSM, EDGE, WCDMA, HSPA+, with LTE on the horizon).  As the number of bands and band combinations grow, frequency flexibility and signal routing at the platform level have increased in importance as critical parameters for 3G mobile device development.
This sets up an unprecedented challenge for front end suppliers, who are challenged to design a broad portfolio of high-performance, multi-band, multimode front ends and components that offer frequency flexibility, ease of implementation, size reduction, and low current consumption.
Presentations in this workshop will focus on the design challenges to meet these multi-mode front end requirements along with the required advancements in device technology and design techniques to meet the overall bandwidth and efficiency requirements.  Design techniques of linearization, efficiency enhancement, power detection and controls will be covered in design examples utilizing various technologies such as GaAs HBT, CMOS, Silicon-on-Insulator and Silicon Germanium.


  1. Ville Vintola, Nokia
    “OEM prospective for Multi-mode solutions”
  2. Ray Arkiszewski, RFMD
    “GaAs HBT Multi Mode Amplifiers”
  3. David Ripley, Skyworks Solutions
    “Multi-mode, Multiband Power Amplifiers and Serial Bus Interface Standards”
  4. Larry Larson, University of California at San Diego
  5. Dan Nobbe, Peregrine
    “Multimode Antenna Switch Modules”
  6. Nadim Khlat, RFMD
    “Tunable Front Ends Performance Benefits”
  7. Pasi Tikka, Epcos
    “Multimode Filter and Switch Modules”

Sunday, 8:00 - 17:00
Silicon-Based Technologies for Millimeter-Wave Applications

Reviewed by: MTT-6, MTT-16, RFIC

            Jitendra Goel, Raytheon Company
            Lance Wei-Min Kuo, Raytheon Company
            Didier Belot, STMicroelectronics
            Eric Kerhervé, IMS Lab
            Georg Boeck, TU Berlin

Traditionally, millimeter-wave (MMW) circuits utilizing only III-V technologies have been employed in low-volume, high-performance products. With the recent progress of highly scaled Si-based (SiGe and CMOS) technologies achieving fT and fmax beyond 200 GHz, the application space of Si-based technologies has broadened from digital, analog, RF, and microwave domains to include MMW applications.
The workshop will focus on MMW applications such as imaging (94 GHz and 140 GHz), automotive radar (LRR at 77 GHz and SRR at 79 GHz), and wireless high data rate communications (W-HDMI at 60 GHz). It gives an overview of recently developed architectures, circuit design techniques, and antenna configurations to meet the demanding performance specifications of MMW applications.


  1. Ali Hajimiri, California Institute of Technology
    “Si Millimeter-Wave Systems”
  2. Gabriel M. Rebeiz, University of California at San Diego
    “Ultra-Low Power Millimeter-Wave Phased Arrays and Gbps Communications Systems Using On-Chip Antennas”
  3. M. C. Frank Chang, University of California, Los Angeles
    “60-1300 GHz Circuit/System Developments Based on Super-Scaled CMOS”
  4. Tian-Wei Huang and Huei Wang, National Taiwan University
    “Millimeter Wave Broadband Multi-Gigabit CMOS Transceiver Design”
  5. Piet Wambacq, IMEC
    “CMOS Radio Integration for High-Datarate 60 GHz Applications”
  6. Ali Niknejad, UC Berkeley
    “mm-Wave Medical Imaging Using a 94 GHz Time-Domain Ultrawideband Synthetic Imager (TUSI)”
  7. Ullrich Pfeiffer, University of Wuppertal
    “Silicon Process Technologies for Emerging Terahertz Applications”
  8. Pierre Busson, STMicroelectronics
    “60 GHz W-HDMI Transceiver”
  9. Joy Laskar, Georgia Tech
    “mmW Digital CMOS Radio Solutions for Ultra-Low Power, High Resolution Sensing and High Bandwidth Connectivity”
  10. Cathia Laskin, University of Toronto
    “140 GHz Imaging”

Sunday, 8:00 - 17:00
RF Packaging Solutions for Wireless Communication Platforms

Reviewed by: MTT-12, MTT-20, RFIC

            Telesphor Kamgaing, Intel Corporation
Vijay Nair, Intel Corporation
Clemens Ruppel, TDK-EPC

In order to satisfy the decreasing form factor and increasing functionality demand from novel devices such as netbooks and smartphones, it is imperative to create a platform, where different radios and digital logic have to co-exist. This ultimate goal can only be achieved by overcoming various significant challenges at the silicon, packaging and testing levels. This full day workshop will focus on recent research and development work that will enable future ultra-small form factor computing and communication devices that incorporate one or multiple radios on the same platform. Various technology ingredients and packaging solutions for 60GHz, WiFi, WiMAX, Bluetooth, GPS and 3G/4G radios among others will be addressed by leading industrial and academic experts in the field.


  1. Vijay Nair, Intel Corporation
    “Multi-protocol Multi-radio Wireless Platform Integration Challenges”
  2. Joy Laskar, Georgia Institute of Technology
    “Development of Millimeter-Wave QFN: CMOS, PCB and Phased Array”
  3. Anh-Vu Pham, University of California, Davis
    “Development of Ultra-small Wireless Passive Modules Using 3-D Organic Metamaterials”
  4. Telesphor Kamgaing, Intel Corporation
    “Package Level Realization of Passives for Multiradio Wireless Modules”
  5. Clemens Ruppel, TDK-EPC
    “Front-End Integration for Multi-Band, Multi-Standard Mobile Phones Based on LTCC”
  6. William Chappell, Purdue University
    “Silicon on Silicon Packaging Using Self-aligned Interconnects”
  7. Walter De Raedt, IMEC
    “3D Heterogeneous Integration Techniques for Wireless Devices”
  8. Kevin Slattery, Intel Corporation
    “RF Interference in Small Form Factor Devices”




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Sponsorship opportunity available

Paper Submission Due
7 Jan, 2010

Program book, conference and hotel registration open
2, March, 2010

Final Manuscript Due
2 March, 2010

RFIC 2010
23 - 25 May, 2010

Microwave Journal

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